High frequency multi-port switching circuit

ABSTRACT

This invention concerns a multi-port switching circuit which may operate at frequencies up to and even beyond 100 GHz. The invention may be implemented as a GaAs based monolithic microwave integrated circuit. The circuit comprises at least three ports arranged in a star configuration around a central ring. A single switching device is associated with each port. Each switching device is connected to two transmission lines to provide impedance matching and an interconnecting path around the ring. The transmission lines are initially chosen to have a length of a quarter wavelength at the center of the band of operation of the switch. The matching lines and the lines which form the interconnecting ring are then subject to an optimization procedures in which each pair of the switching devices is in turn modeled in their ON state which the remainder of the switching devices is modeled in their OFF state. The optimization procedure aims to achieve low transmission and insertion loss, while provide good isolation.

TECHNICAL FIELD

This invention concerns a multi-port switching circuit. The embodimentsof one realization may operate at frequencies around 60 GHz; but withappropriate devices embodiments may operate at other frequenciesincluding higher frequencies up to and even exceeding 100 GHz.

BACKGROUND ART

Switching networks have been developed which operate at frequencies upto and exceeding 40 GHz. The switching elements in such networks use acombination of shunt passive FET devices and quarter-wave transformers,or combinations of series and shunt passive FET devices. Passive FETdevices, in one type of switch, require bias to be applied to the gateand not between the source and drain. Broadband switches using acombination of active and passive switching elements have also beendemonstrated.

SUMMARY OF THE INVENTION

The invention provides a multi-port switching circuit, comprising atleast three ports, interconnected by transmission lines. Thetransmission lines are arranged with a central ring and outwardlyextending arms. The ports are positioned at the ends of respective arms.The term "ring" has been used in a loose descriptive sense and does notnecessarily imply circularity.

A switching device, such as a FET or HEMT, is associated with each port.The switching device is arranged between a first and a secondtransmission line. Each switching device may be arranged to shunt themain signal path of the circuit with its main current path extendingbetween the junction of the first and the second transmission line, andsignal ground. The first transmission line extends between the port andthe switching device to provide impedance matching, and the secondtransmission line also provides impedance matching and a connecting pathto the ring. The first and second transmission lines are initiallychosen to have lengths of a quarter wavelength at the centre of the bandof operation of the switch. The dimensions of the matching lines and thelines which form the connections to the ring are then determined using aprocedure to optimize the performance of the circuit.

The optimisation procedure involves the selection of two of the ports asthe input and output ports of the switching network. The switchingdevices associated with these ports are modelled by ON staterepresentations. The other port, or ports, are isolated, and theirassociated switching devices are modelled in the OFF state. Optimisationof the transmission lines lengths and widths then aims to providedesired performance levels such as low transmission loss, good isolationat all other ports, low return loss or high power handling.

Other parameters such as gate width and length and substrate thicknessmay also be optimised, but these parameters are usually predetermined byselection of a particular fabrication process for the switching circuit.

The optimisation procedure continues by varying the signal flow in thecircuit. That is, in the first step, the signals flow from a first portto a second port, with the other ports isolated; in the second step,signals flow from the second port to a third port with the other portsisolated. This process continues until a set of optimised parameters isestablished for each signal path configuration. The range of optimisedparameters are then examined and a single best set of parameters is usedto complete the design. The optimisation process uses conventionaltechniques and is able to take into account the effects of all the bendsand discontinuities in the switch.

The optimisation provides similar switching performance between any pairof ports, independent of the chosen input and output.

The switching devices may be arranged symmetrically around the ring tosimplify the optimisation process. However, symmetry is not arequirement.

HEMTs (High Electron Mobility Transistors) may be used to provideoperation at high microwave frequencies. The choice of switching deviceinfluences, amongst other things, the power-handling capability of thecircuit. Any switching device may be chosen. Two terminal devices, suchas diodes including PIN-diodes; three terminal devices such as genericfield effect devices, for example the FET, MOSFET, MESFET and HEMT; andmulti-terminal devices, such as dual gate devices, could all be used.

Switching devices, such as HEMTs, may be modelled in their OFF state bya resistor and a capacitor in series, and in the ON state by a resistorand an inductor arranged in series. However, different and more complexmodels can be chosen.

Switching action may be achieved by biasing a pair of HEMTs in their ONstate to create the signal path, while biasing all other HEMTs in theirOFF state. Bias is applied to the gate terminals of the HEMTs, the drainterminal is connected to the junction between the first and secondtransmission lines, and the source terminal is grounded. The OFF or lowimpedance state is achieved by applying a DC voltage of zero volts tothe gate terminal. The ON or high impedance state is achieved byapplying a DC voltage slightly greater than that required to pinch thedevice off.

A feature of this circuit is that only a single switching device isrequired at each port as a result of optimizing the performance of thenetwork for low losses and high isolation. Thus the switching circuitoffers the benefit of providing a multi-port interconnection requiringan equal number of switching devices equal to the number of switchedports.

Embodiments of the multi-port switching circuit using HEMTs may operatein a frequency band around 60 GHz, and are able to provide all the usualswitching functions, such as multiplexing at millimeter-wave (mm-wave)frequencies.

Switching networks embodying the invention may be used in multi-functioncircuits to allow functionality to be re-configured by altering thecontrol voltages on the switching devices to re-route the signal.

A circuit containing an embodiment of the switching network may providethe ability to amplify a signal, up-conversion, down-conversion, or upand down conversion with amplification.

Circuits embodying the invention may offer redundancy that enablescontinued operation after failure of a circuit connected to theswitching circuit. For instance, if a switching circuit was arranged tointerconnect a number of identical circuits such as transmit channels,or receive channels, failure in any particular channel can be overcomeby altering the control voltages on the switching circuit to re-routethe signal path.

When the switching circuit is used to interconnect non-identicalcircuits, such as many transmit and receive circuits having differentperformance characteristics, then the switching circuit can beconfigured to use the transmit and receive circuits which have the mostappropriate characteristics for the current conditions. For instance, ifthe transmit and receive circuits have performance characteristics whichmake them suitable for operation in different conditions then theswitching circuit may be configured to use the transmit and receivecircuits that are appropriate for the current conditions, and can bere-configured as conditions change.

Multiple cascades of individual networks can be connected together tocreate complicated routing networks. The robustness of the multiple portconfiguration allows for redundancy in the design of interconnectionsbetween systems.

BRIEF DESCRIPTION OF THE DRAWINGS

An example of the invention will now be described with reference to theaccompanying drawings, in which:

FIG. 1 is a layout of a three port switch embodying the invention;

FIG. 2 is a graph showing the simulated signal response of the switchingnetwork of FIG. 1;

FIG. 3 is a layout of a six port switch embodying the invention;

FIG. 4 is a graph showing the simulated response of the switchingnetwork of FIG. 3; and

FIG. 5(a) is an OFF state model of a HEMT that may be incorporated intoa switch embodying the invention, and

FIG. 5(b) is an ON state model corresponding to FIG. 5(a).

BEST MODES FOR CARRYING OUT THE INVENTION

Referring to FIG. 1, three port switch 1 comprises three transistors 2,3 and 4 each connected to a central ring 5 by means of respectivetransmission lines 6, 7 and 8. The transistors 2, 3 and 4 are eachassociated with a respective external port 9, 10 and 11 by means ofrespective transmission lines 12, 13 and 14.

Transistor 2 has its source 15 at signal ground, its drain 16 connectedto the transmission lines, and a gate 17. The terminals of transistors 3and 4 have not been numbered, for the sake of brevity.

In normal operation two of the switches are turned ON to select theinput and output ports.

FIG. 2 shows the simulated magnitude responses when the switch isconfigured with input applied at port 9 and output taken from port 10;the magnitude responses for any two sets of ports is nominallyidentical.

Curve 18 shows the simulated loss from the input port 9 to the outputport 10 to be less than 2 dB at the center frequency of 61 GHz, and toremain less than 3 dB between 54 to 66 GHz. Curve 19 which shows theinput match to be better than 20 dB at the centre frequency and remainsgood over a wide bandwidth; that is greater than 10 dB over 8 GHz ofbandwidth. Curve 20 shows the isolation between the input port 9 and theisolated OFF port 11 to be better than 16 dB.

Referring to FIG. 3, six port switch 30 comprises six HEMTs 31, 32, 33,34, 35 and 36 arranged around a central ring 37. Each of the transistorsis connected to the ring 37 by respective lengths of transmission line38, 39, 40, 41, 42 and 43. The external connection ports 44, 45, 46, 47,48, and 49 are connected to respective HEMTs by transmission lines 50,51, 52, 53, 54 and 55. The transmission lines provide impedancematching, for both the signal transmission path and the isolated ports.

FIG. 4 shows the simulated magnitude response when the switch isconfigured with input applied at port 44 and output from port 47; themagnitude responses for any two sets of ports is nominally identical.

Curve 56 shows the simulated loss from the input port 44 to the outputport 47 is just over 3 dB at the center frequency of 61 GHz, and remainsless than 4 dB between 57 to 66 GHz. Curve 57 shows the input match isbetter than 15 dB and remains good over a wide bandwidth; that isgreater than 10 dB over 8 GHz of bandwidth. Curve 58 shows the isolationbetween the input port 44 and any of the OFF ports is better than 16 dB.

FIG. 5 shows the bi-state model of the two finger, fifty micrometer(i.e., 2 by 25 μm fingers) wide HEMT used in this embodiment. In the OFFstate shown in FIG. 5(a) the HEMT is biased at zero volts. In this statethe HEMT is represented by a 3.2 ohm resistor and a 0.03 picoFaradcapacitor arranged in series. In the ON state shown in FIG. 5(b), theHEMT is biased slightly beyond pinch-off. In this state the HEMT isrepresented by a 23.4 ohm resistor and a 3 nanoHenry inductance arrangedin series.

The switch is optimized using the bi-state model for a stated set ofperformance parameters in order to produce the required performance. Anyof the parameters can, of course, be traded against other parameters toachieve different levels of performance that may be required bydifferent applications; for instance input match could be traded againstpower handling capability. If the circuit were connected to a number ofdifferent circuits having different performance characteristics then itcould be optimised accordingly.

Although the invention has been described with reference to a particularembodiment, it should be appreciated that the invention could beembodied in many other forms. For instance, there is no limit on thenumber of ports which can form the switching network, symmetry is not arequirement for the operation of the network, and operation is notlimited to particular process technologies or geometries for the activedevices. Besides GaAs fabrication technology the invention is applicableto Si and InP processes, among others.

Although this invention has been described with reference to a switchingcircuit which operates at about 61 GHz and it is believed to be usefulat much higher frequencies, it should also be understood that theinvention may be useful in lower frequency switches.

It will be appreciated by persons skilled in the art that numerousvariations and/or modifications may be made to the invention as shown inthe specific embodiments without departing from the spirit or scope ofthe invention as broadly described. The present embodiments are,therefore, to be considered in all respects as illustrative and notrestrictive.

What is claimed is:
 1. A multi-port switching circuit, comprising:atleast three input/output ports interconnected by transmission lines, thetransmission lines being arranged with a central ring and outwardlyextending arms, each arm including first and second transmission lineswith the ports being positioned at ends of a respective firsttransmission line of a corresponding arm; a switching device associatedwith each port, each switching device being arranged between a junctionof the respective first and second transmission lines of thecorresponding arm, with each respective first transmission lineextending between the corresponding port and the associated switchingdevice to provide impedance matching, and the second transmission lineproviding impedance matching and a connecting path to the central ring.2. The multi-port switching circuit according to claim 1, wherein eachswitching device associated with each port is a single switching device.3. The multi-port switching circuit according to claim 2, wherein thesingle switching device associated with each port is arranged to shunt amain signal path of the circuit with a main current path of theswitching device extending between the junction of the first and secondtransmission lines, and ground.
 4. The multi-port switching circuitaccording to claim 1, wherein the switching devices are HEMTs.
 5. Themulti-port switching circuit according to claim 1, wherein the switchingdevices are arranged symmetrically around the ring.
 6. The multi-portswitching circuit according to claim 1, wherein dimensions of thematching lines and the lines which form the connections to the ringoptimize the performance of the circuit.
 7. The multi-port switchingcircuit according to claim 4, whereineach HEMT includes a drainterminal, source terminal and a gate terminal, a pair of HEMTs is in anON state to create a signal path with each of the ON state pair of HEMTshaving the respective drain terminals connected to the junction betweenthe corresponding first and second transmission lines, the respectivesource terminals grounded, and a DC voltage applied to the respectivegate terminals, said DC voltage being slightly greater than thatrequired to pinch off each HEMT of the pair of HEMTs; and all remainingHEMTs are in the OFF or low impedance state with a DC voltage of zerovolts applied to the respective gate terminals.
 8. In a multi-portswitching circuit having at least three input/output portsinterconnected by transmission lines, the transmission lines beingarranged with a central ring and outwardly extending arms, each armincluding first and second transmission lines with the ports beingpositioned at ends of a respective first transmission line of acorresponding arm, and a switching device associated with each port,each switching device being arranged between a junction of therespective first and second transmission lines of the corresponding arm,with each respective first transmission line extending between thecorresponding port and the associated switching device to provideimpedance matching, and the second transmission line providing impedancematching and a connecting path to the central ring, a procedure foroptimizing dimensions of the matching lines and the lines which form theconnections to the ring for selected performance parameters of thecircuit, the performance parameters being selected from a list ofperformance parameters consisting of low transmission loss, goodisolation at isolated ports, low return loss and high power handling,said procedure comprising the steps of:selecting two of the ports as theinput and output ports of the switching network and providing a signalpath configuration; modeling the switching devices associated with theselected first and second ports by ON state representations; isolatingthe remaining ports by modeling their associated switching devices in anOFF state; and adjusting the transmission lines lengths and widths toachieve the selected performance parameters.
 9. The procedure accordingto claim 8, further comprising the steps of:varying the signal flow inthe circuit including selecting another two ports as the input andoutput ports of the switching circuit by modeling the switching devicesassociated with the selected other two ports in the ON state with theremaining ports isolated by modeling their associated switching devicesin the OFF state, each of the selected other two ports providing asignal path configuration which is different from any other signal pathconfiguration provided by any previously selected two ports; continuingvarying the signal flow until a set of optimized dimensions of thematching lines and the lines which form the connections to the ring forthe selected performance parameters are established for each signal pathconfiguration; and examining the range of optimized dimensions of thematching lines and the lines which form the connections to the ring forselected performance parameters and using a single optimized dimensionsof the matching lines and the lines which form the connections to thering for selected performance parameters to complete the design.
 10. Theprocedure according to claim 9, wherein the switching devices aremodeled in their OFF state by a resistor and a capacitor in series, andin their ON state by a resistor and an inductor arranged in series.